The increasing complexity of modern Softwares causes much more cost to design Hardwares with various and complex applications. Hardware design requires strong background and it is also barrier to meet critical time-to-market. The institute of Korean University developed system and method for fully automatic translation from high-level langagues (C, C++, Java, etc) code into Verilog HDL. On the basis of the GCC (GNU Compiler Collection) complier, it has the Verilog backend and the GCC front-end and middle-end. By using the GCC front-end and middle-end, GCC RTL (Register Transfer Langauge) code can be easily mapped to HDL code without complex data structures and control statements. It can support all syntaxes of C in Verilog code translation and utilize all of GCC's optimizations for RTL codes.
Additionally, the execution framework provides seamless cross calls between SW and HW by providing SW calling convention to HW code generation, HW and SW shares one stack space for cross calls. The execution framework consists of the GCC-to-Verilog compiler, PICO processor (host processor), and FPGA. For low communication overhead between SW and HW, the special call instruction is added to PICO ISA.

Innovative Aspects:
Advantages :
1.Support translating all kinds of C syntaxes into Verilog"All kinds of C data structures: dynamic allocated pointers, structures, arrays, enums, etc."Unlimited nesting function calls :
-SW-to-HW, HW-to-SW, HW-to-HW (include recursive) calls
-HW shares the same stack space and follows SW calling convention."All kinds of variables: local, global, static
Normal software code can be translated to run in FPGA without any need of modification.
2.Optimize the communication overhead among SW and HW : "PICO processor & compiler
3.Performance improvement gained by:"Executing independent instructions in parallel.

Innovations :
It is technically superior to other approaches.
1.Comparison to the existing techniques :
"None of the existing techniques fully support all C syntaxes.
2.Comparison to Handel-C which is a high level programming language for low-level hardware : "A low level hardware/software construction language
-Users must specify both timing and parallelism using additional directives"Many restriction on translatable C code
-No support for: float, double, long-double types, or union construct
-Operands of a statement must have same length, and takes one cycle
-Does not allow dynamic allocate pointers
3.Comparison to Impulse C which is a subset of the C programming language :"Support translation of only a subset of C language:
-Limited use of structure, pointers must be resolvable at compile time
-No recursive function calls or HW call back to SW
-No irregular control statements
Applications must be greatly rewritten to be translated to HDL

 

Patents/Rights: Patent(s) applied for but not yet granted

Type of Organisation: